Posts Tagged ‘Harry Foster’

19 February, 2013

Learn about new standards, industry surveys and trends

This year’s DVCon is set and if you have not yet registered, you can do it now – or just show up!  If you want to secure seating at some of the Monday tutorial events, I strongly encourage pre-registration to ensure you can secure a seat.  And if you just want to see the exhibits and chat with suppliers, that’s free.

The IEEE low power format is set to close on its current round standardization shortly and DVCon is a great place to learn all about it from the experts.  Harry Foster will update the DVCon attendees on design and verification trends over lunch on Tuesday and later that afternoon, Mentor CEO, Wally Rhines will offer this year’s DVCon keynote.  His keynotes are always insightful and entertaining.  And if you want to catch me, you can find me with the Mentor staff at the Mentor exhibit booth.  Or just follow @dennisbrophy on Twitter and I will share info on paper presentations and other happenings.  For more details on the events mentioned above, see below.  For more information DVCon in general, visit the website at

Monday | February 25th | 1:30pm – 4:30 | Fir Ballroom
Low Power Design, Verification, and Implementation with IEEE 1801™ UPF™

The past few years, the IEEE P1801™ (Unified Low Power – UPF) Working Group has been busy working on an update to the industry’s standard for low power design, verification and implementation.  Accellera has brought together experts from many EDA tool suppliers and users for this tutorial.  Attendees can expect to gain a detailed understanding of of the IEEE standard (concepts, terminology & features) as well as an understanding of the practical aspects to apply UPF in real world flows.

The following experts will be help you learn about the new standard – and will be available to interact with at the conclusion of the tutorial.

  • John Biggs – ARM, Inc.
  • Sushma Honnavara-Prasad – Broadcom Corp.
  • Dr. Qi Wang – Cadence Design Systems, Inc.
  • Erich Marschner – Mentor Graphics Corp.
  • Jeffrey Lee – Synopsys, Inc.

Learn more, then register.

Tuesday | February 26th | 11:30am – 12:45pm | Pine/Cedar Ballroom
The Changing Landscape in Functional Verification: Industry Trends, Challenges, and Solutions
Presented by Harry Foster

Mentor Graphics invites you to join us for lunch—where we will present, for the first time publicly, highlights from this year’s Wilson Research Group Functional Verification Study. Be the first on your block to learn the latest verification trends, challenges, and solutions.
Learn more, then register.

Tuesday | February 26th | 3:30pm – 4:30pm | Oak/Fir Ballroom
Speaker: Wally Rhines, Chairman and CEO of Mentor Graphics

As a thought provoking, timely, and informative presentation, this keynote session will focus on functional verification trends and the accelerated adoption of advanced functional verification technologies, methodologies and languages.
Learn more, then register.

Booth #901
Tuesday & Wednesday (February 26th & 27th)
3:30pm – 6:30pm

I look forward to meet up with those who attend DVCon.  You can catch me at or around the Mentor booth for the last three hours of the conference.

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20 November, 2012

Verification Academy Adds Major New Technical Resource

The Verification Academy adds another major methodology cookbook to focus on effective coverage adoption.  The Coverage Cookbook describes the different types of coverage that are available to track your verification process progress, how to create a functional coverage model from a specification, and provides examples to implement functional coverage for different types of designs.

Verification Academy “full access” members have access to the free Coverage Cookbook and the UVM/OVM Cookbooks as well.  Are you a registered full access member?  If not, register now to become a full access member.  (Restrictions apply.)

Coverage is not a new topic.  It was one of major additions to the SystemVerilog (IEEE Std. 1800™-2009) standard.  But the SystemVerilog functional coverage extensions were left to the verification engineer to use in such as way to return meaningful measurements of how much of the design specification was being tested.  The Universal Verification Methodology (UVM) offers greater structure for coverage over SystemVerilog, but it too, is still only a piece of the puzzle.

imageAs verification teams have come to generate greater amounts of information from use of SystemVerilog, UVM and other verification tools, the data from the verification runs needs to be easily used to drive coverage closure.  Within the Mentor Graphics Questa verification platform, this resulted in the development of the Unified Coverage Database (UCDB) and associated verification management and planning features.

Since verification teams use a variety of tools and technology from many sources, it was an imperative that verification information could be easily shared and combined to help drive faster coverage closure across the industry.  This is why Mentor Graphics donated its UCDB API to Accellera where it became the Unified Coverage Interoperability Standard (UCIS).

It would be great to think that we are done; but we’re not.  Tools and data are just two dimensions of the three dimensions to any IC design project.  A comprehensive approach to verification management that handles all of this adds the third dimension.  The Mentor Graphics Questa Verification Management features handle all this.

Now the question is how to best adopt and use all the capabilities at hand from the standards to the verification technology at your finger tips.

The Verification Academy Coverage Cookbook is one of the important tools you now have to help pull all the information into a single place where you can learn the theory and put that theory into practice.  The Coverage Cookbook is much like the OVM/UVM Cookbooks in that it is web friendly, while supporting the ability for you to generate a PDF file of the whole document in case you want to have a printed copy or have it available for offline reference.

The Theory section covers:

  • What is coverage?
  • Kinds of coverage
  • Code Coverage
  • Functional Coverage
  • Specification to coverage
  • Coding for analysis

The Practice section shows three examples you can use today:

  • Bus protocol coverage using ARM® APB3
  • Block level coverage using UART
  • Datapath coverage using BiQuad IIR Filter

The Coverage Cookbook is a live document. You can expect continued extensions and contributions to enhance it.  As Harry Foster, Mentor Graphics’ Chief Scientist Verification put it, “Methodology is the bridge between tools and technologies, which creates a productive, predictable, and repeatable solution.”  We should expect that our collective use of this technology will help hone the methodology which is the heart of the Coverage Cookbook.  And with this use, we should expect the Coverage Cookbook to evolve as we achieve greater verification productivity.

Let us know what you think about the Coverage Cookbook and what we might be able to do to improve it.  In the meantime, Happy Coverage Closing!

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