VHDL Update Comes to Verification Academy!
VHDL-2008 Explained Via 7 Course Modules
For some time now a dedicated group of engineers have defined and standardized an important update to the VHDL standard. Also know as IEEE Std. 1076™-2008, this update to VHDL took an interesting path to get to where it is today. The VHDL standards team started the standards development work in the IEEE but sought additional input and standards project funding from industry. Accellera provided a good venue in which to get industry input and feedback for an update to the VHDL standard along with funding. Once industry input was taken into account, the proposed update to VHDL, approved by Accellera, was returned to the IEEE for official standards ratification and ongoing maintenance. Jim Lewis, the IEEE VHDL Working Group Chair, points out this is the greatest update to VHDL since VHDL 93. And I agree. Jim is also the subject matter expert for the VHDL-2008 course modules on Verification Academy mentioned in this blog.
Verification Academy Modules
In less than an hour and half – over 7 course modules – Jim will layout out the additions and changes to VHDL-2008 to simplify the language and extend it to address more of your pressing design and verification challenges with the addition of reusable data structures, simplified RTL coding and the inclusion of fixed and floating point math packages.
As part of my role in international standardization as co-convenor of the IEC TC 93 WG2 (now known as IEC TC 91 WG 13) and in keeping with the IEEE/IEC dual-logo agreement, I helped complete the dual logo process for this version of VHDL in 2011. VHDL-2008 is also now known as IEC 61691-1-1-2011 – Behavioural languages – Part 1-1: VHDL Language Reference Manual. I think we can all agree that that name is a bit much that we can simply call it VHDL-2008.
With this round of standardization complete, the VHDL-2008 course modules arrive just as complete support for VHDL-2008 emerges here at Mentor Graphics in our ModelSim and Questa products.
I encourage and invite VHDL users to get acquainted with VHDL-2008 via the seven course modules on Verification Academy. Verification Academy “Full Access” membership is required. And it is easy to sign up (certain restrictions apply). For a quick look at what the courses offer, the introduction page found here will show you more details about the following modules.
|“VHDL-2008 Why It Matters” Modules|
Additional Reference Material
There is additional reference material you may wish to have to get the most out of VHDL-2008. Here is my short list:
Posted January 24th, 2013, by Dennis Brophy
- Portable Stimulus Specification Released for Public Review
- Reusing Existing Descriptions with New Languages
- DAC 54 Spotlight on “Portable Stimulus”
- Going With The Flow – Overview
- DVCon China: Formal Technology Is Set for Growth in Asia
- Design & Verification IP Forum 2017
- Portable Stimulus: Standard vs. Tool vs. Language
- Portable Stimulus the Hot Topic at DVCon U.S. ’17
- The Walking LRM
- Will UVM 1800.2 Leave You Behind?