Two Articles You Need to Check Out
As Editor of Verification Horizons, I’d like to point out a couple of articles that you really need to check out, if you haven’t already. If you want to take a look at full issues of Horizons, you can find them here.
I’m sure many of you have found yourselves in the painful situation of trying to track down a hard-to-reach coverage hole only to find out, after way too much time, that the coverage item is actually unreachable. If you have, then you need to read “Using Formal Technology To Improve Coverage Results,” which will explain the unique ability of formal technology in Questa to improve coverage results while reducing the amount of time wasted trying to hit unreachable states.
The other article I want you to be sure and check out is ” Automation Management: Are You Living a Scripted Life?” In it, you’ll learn how Questa’s Verification Run Manager will help you automate your verification process so you can focus on verifying your designs and not on debugging your environment infrastructure. As you’ll see, the proper application of automation lets you boost the productivity of your verification engineers while reducing the maintenance burden on your CAD teams. This article is actually the third in a series on Verification Management, and you can check out the first two articles here and here.
The DAC issue of Verification Horizons is coming soon, so be sure to take a look.
- IEEE-SA EDA & IP Interoperability Symposium
- Back to School: How to Educate Yourself and Your Colleagues About Formal and CDC Verification
- Mentor Announces Joint Portable Stimulus Contribution with Cadence, Breker
- Ready for a Verification Extravaganza in the Land of Verification Engineers?
- Conclusion: The 2014 Wilson Research Group Functional Verification Study
- How Formal Techniques Can Keep Hackers from Driving You into a Ditch, Part 2 of 2
- Part 12: The 2014 Wilson Research Group Functional Verification Study
- Beating Design Complexity with VirtuaLAB
- Part 11: The 2014 Wilson Research Group Functional Verification Study
- How Formal Techniques Can Keep Hackers from Driving You into a Ditch, Part 1 of 2