Archive for December, 2010

8 December, 2010

Hi Everyone,

Just wanted to let you know that the latest edition of our Verification Horizons newsletter is available here. I’ll be blogging about some of the articles individually a bit later, but for now you can get an overview of the contents from reading my editor’s note. In addition to getting a taste of the articles, you’ll also learn how my daughter’s 10th birthday party was like an engineering project.

Here’s the Table of Contents:

Page 6…Survey Says: Verification Planning
by Harry Foster, Chief Verification Scientist Design Verification Technology,
Mentor Graphics Corporation

Page 8…Firmware Verification Using SystemVerilog OVM
by Ranga Kadambi, Eric Eu, and Sudheer Arey, Infineon Singapore
Mark Glasser and Christoph Suehnel, Mentor Graphics Corporation

Page 14…A SystemVerilog Configurable Coverage Model in an OVM setup
by Parag Goel, and Sakshi Bajaj, Applied Micro
with Pushkar Naik, Applied Micro
and Ashish Kumar, Mentor Graphics Corporation

Page 25…Advanced Techniques for AXI Bus Fabric Verification
by Alain Gonier and Jay O’Donnell, Mentor Graphics Corporation

Page 34…Converting Module-Based Verification Environments to Class-Based Using SystemVerilog OOP
by Amit Tanwar, Mentor Graphics Corporation

Partners’ Corner
Page 38…Verifying a CoFluent SystemC IP Model from a SystemVerilog UVM Testbench in Mentor Graphics Questa
by Laurent Isenegger, Jérôme Lemaitre and Wander Oliveira Cesário, CoFluent Design

Page 44…What You Need to Know About Dead-Code and X-Semantic Checks
by Ping Yeung and Erich Marschner, Mentor Graphics Corporation

I hope you enjoy this issue of Verification Horizons. If you’d like to register to receive future issues automatically (along with nearly 30,000 of your friends and colleagues), please click here.

Thanks for your support,
Tom Fitzpatrick
Editor, Verification Horizons

3 December, 2010

As the saying goes: Those who fail to plan, plan to fail. With that said, I am excited to announce a new module focused on Verification Planning, which has been one of the Verification Academy’s most-requested subjects for new content. The new Verification Planning module is delivered by our subject matter expert, who literally wrote the book on the subject, Peet James.

The goal of verification planning and management is to architect an overall verification approach, and then to document that approach in a family of useful, easily extracted, maintainable verification documents that will strategically guide the overall verification effort so that the most amount of verification is accomplished in the allotted time. The aim of this module is to define terms, logically divide up the verification effort, and lay the foundation for actual verification planning and management on a real project.

I think you will really enjoy and be enlightened by Peet’s treatment of the subject, and hopefully, you can apply many of the techniques that he presents to your own projects.

Speaking of applying Verification Academy techniques—we just conducted a large survey about the academy and found some interesting results that I would like to share with you. First, Figure 1 shows who is viewing the Verification Academy content by job title.


Figure 1: Verification Academy viewers by job title

It’s not too surprising that a majority of the viewers are verification engineers, with a ratio of about 3.5 verification engineers for every 2 designers.

In addition to who is viewing the Verification Academy, we were interested in learning the viewer’s type of targeted design implementation to get a better understanding of our viewers’ needs. Figure 2 shows who is viewing the Verification Academy by their type of targeted design implementation.


Figure 2: Verification Academy viewers by targeted design implementation

We are obviously seeing a growing number of FPGA engineers interested in advanced functional verification. Today’s complex SoC-base FPGA designs are not your mom and pop variety of FPGA designs. More advanced verification skills are required to ultimately meet both quality and schedule goals.

Another question we wanted to answer through our survey is whether the Verification Academy has been useful. One way to answer this is to see how many viewers had actually applied or plan to apply the knowledge they learned in the Verification Academy on their own projects. The survey results are shown in Figure 3.


Figure 3: Verification Academy viewers who have applied knowledge on projects

We also wanted to determine through the survey if the content presented in the Verification Academy was at an appropriate level of detail. The survey results are shown in Figure 4.


Finally, we wanted to determine through the survey which additional topic in advanced functional verification should be covered in the Verification Academy. Figure 5 presents the results.


Figure 5: Verification Academy new subject content request

Your feedback is important to us, and we are very excited that our new Verification Planning module was one of the top requests from the Verification Academy survey participants.

I would like to encourage you to check out all our new and existing content at the Verification Academy by visiting

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