Xpedition Enterprise Blog

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23 April, 2015

This is the ninth post in a series showcasing the winners of the 2014 Technology Leadership Awards. View the previous ones here.

Runner up in the Military & Aerospace category: BAE Systems, United Kingdom.

BAE Systems Logo

Design: Binocular helmet mounted display

The system is a major advance in helmet-mounted heads-up display technology and includes a binocular display, opto-inertia head tracking technology, fast response times, and fully-integrated digital night vision camera.It also meets all weight and size targets and provides improved comfort.

Design team:

  • Matthew Offredi, Gary Chambers, Daniel Smith, Sammy Laver, Ross McCullie, Gary Prior

Design challenges:

  • The helmet was designed concurrently by the electronics, mechanical, optical and system design teams. This concurrent design approach aided in solving issues across the complete system, but this organic environment meant that there were a number of iterations during the design process.
  • Weight / CoG (center of gravity): Helmet designs are subjected to ejections tests and therefore weight/mass and CoG is a critical driver in the design.
  • Power and thermal have to be managed carefully to reduce thermal effects (to avoid cooking a pilots head).
  • Keep-out areas were needed in areas that were subject to head impact, which constrained component skyline and placement.
  • An irregular board outline was needed as the module mounted to a helmet.
  • Design testability, both in production and maintenance, is a key driver in the design.
  • The major challenge with these devices was the breakout and subsequent routing because the pins were 94% utilized.
  • The design team only had a small window of opportunity to take the design from a concept stage into a fully working product. This short project duration was driven by compressed project time scales, but achieved by using great engineering techniques, a motivated and empowered team, and a number of learn first activities.

BAE Systems Award-Winning Design

Design tools and team comments:

  • Board Station, Hyperlynx®, and ICX
  • All SI was completed with ICX so the board worked first time.
  • There are ~400 signals classified as high speed on the design. The signal integrity strategy required that these signals were grouped and simulated as “what if” Hyperlynx and ICX simulations which drove the schematic topology. This included ensuring that suitable return vias were placed close to any signal layer transition points, to guarantee a good signal return path. The post-routed board was fully simulated in ICX and this was repeated, iteratively, as the design progressed, until the optimum solution was found.
  • The breakout vias perforated the plane areas beneath the FPGAs, so the team used the Hyperlynx Power Integrity tool to analyze and determine if sufficient current was being delivered, and if the current density was not excessive in any area. The high power rail count (31) required careful management.

Judge’s comments

  • “Very nice power distribution work. Very dense placement.”
  • “This board overcame many restraints that are not normally found in most boards. Different thermal restrictions and keep out areas on each side of the board, height restrictions, and an odd shaped board, to name a few. In addition, the electrical, testing, and human engineering make this board a challenge. They provided and excellent description of what they had to overcome.

About the Technology Leadership Awards

Started in 1988, this program is the longest running competition of its kind in the electronic design automation (EDA) industry. It recognizes engineers and designers who use innovative methods and design tools to address today’s complex PCB systems design challenges and produce industry-leading products. See the full list of 2014 winners here.

7 April, 2015

This is the seventh post in a series showcasing the winners of the 2014 Technology Leadership Awards. View the previous ones here.

Runner up in the Industrial Control, Instrumentation & Medical category: Valtronic SA, Switzerland

Valtronic Logo

Design: Ultimate 8 channels miniaturized MRI integrated receiver module with lots of channel separation

Design team: Gabriel Gay, Van Ly Mai, Cristian Anton, Bert de Vries

Design challenges:

  • All components had to be non-magnetic or low magnetic.
  • Miniaturization drove use of ~500 passive SMD 01005. All (9) layers are HDI.
  • 5mm BGA (2 components): Careful placement of the decoupling capacitors, and management of analog/digital signal separation.
  • Used flip chip mounting to minimize connections from the chip to the board; placed all on one side for manufacturing reasons, but this required localized shielding.

Design tools and team comments:

  • Xpedition® Enterprise
  • “The 3D viewer was utilized and later in the design .idf export and .dxf import were a must to make iterations to reduce the final size of the package.”
  • “Clusters were used to simplify the placement process. “Copy circuit” is a must to make sure we had similar placement and routing for each of the receiver channels.”
  • “CES was especially useful to control the differential pairs.”
  • “We exported CCZ files to share the layout for design review with our customer. We also used DxPDF to share valuable data for design review and Part Lister to review BOMs.”
  • We utilized smart utilities, dynamic tune, and outline optimizer along with other capabilities.

Valtronic Award Winning PCB Design

Judge’s comments:

  • “This was a well-documented and excellent solution.”
  • “Good EMI/EMC considerations were given.”

About the Technology Leadership Awards

Started in 1988, this program is the longest running competition of its kind in the electronic design automation (EDA) industry. It recognizes engineers and designers who use innovative methods and design tools to address today’s complex PCB systems design challenges and produce industry-leading products. See the full list of 2014 winners here.

31 March, 2015

This is the sixth post in a series showcasing the winners of the 2014 Technology Leadership Awards. View the previous ones here.

First place winner in the Industrial Control, Instrumentation & Medical category: Fujitsu Technology Solutions, Germany

Fujitsu Logo

Design: A biometric multi-factor authentication; a flexible high-security platform solution for access control, payment terminals, and match on device. The system is based on ARM SoC with crypto co-processors.

Design team: Andreas Schaefer, Timo Bruderek, Joachim Bub, Andreas Titz, Willi Neukam, Peter Bräu, Werner Hasubick, Rudi Häußermann, George Emanuel Valceanu

Design challenges:

  • Security certification: We had to protect the PCB physically against access and intrusion (shield sensitive signals on internal layers with a unique via scheme), and manually routed patterns using a 3-2-3 HDI stack-up.
  • Electro-mechanical design: Spent a lot of time synchronizing with MCAD team on the housing construction.
  • Rigid-flex, RF technology.
  • Some high-speed due to DDR3, Ethernet and USB
  • Tight placement: Lots of mechanical components, some with through-mounts that had to avoid parts on the opposite side.
  • ARM CPU: 100% connected, associated passives and test points were placed on reverse side, 7 power rails.
  • Panelization: Concern for SMD components on the edge; the contour on one side didn’t allow standard V-cuts.
  • We took on a new fabrication process that required optimizing the process from design through manufacture.

2014 TLA Award Winning Design - Fujitsu Technology Solutions GmbH

Design tools and team comments:

  • Xpedition Enterprise (New VX.1 Release)
  • “Used 3D integrated layout to ensure that component placement didn’t collide with the display housing. This combination of PCB optimization and mechanical part fittings can be found everywhere and would have been impossible without the 3D layout feature. The new 3D layout placement and online DRC capabilities were used heavily during this design. With the use of simultaneous 2D and 3D placement control, we achieved very good mechanical accuracy for the first prototype. This quality and accuracy has only been seen in the second or later prototype stages for past projects. We saved approximately 12 weeks by eliminating prototype cycles.”
  • “Accurate 3D models were required; rough 3D models and 2D obstructs were insufficient.”
  • “The design was completed in 8 weeks. The team successfully developed the product while they also implemented new design software, created a new library, and transitioned to new board technologies.”

Judge’s comments:

  • “A high-density flex-rigid design showing the best of design density, advanced manufacturing technology, and flex.”
  • “A Complex 3D problem with interesting methods to manage security of circuit.”
  • “Good stack-up on a tight board.”
  • “Very detailed descriptions of the issues they had to overcome to produce a very tight board. I like the way they utilized the various tools to achieve design requirements.”

About the Technology Leadership Awards

Started in 1988, this program is the longest running competition of its kind in the electronic design automation (EDA) industry. It recognizes engineers and designers who use innovative methods and design tools to address today’s complex PCB systems design challenges and produce industry-leading products. See the full list of 2014 winners here.

5 February, 2015

The close of DesignCon features the Best in Design & Test Awards. The awards span a variety of categories from design tools, to test, to validation and fabrication. We joined a few dozen other eager folks in the Chip Head Theater for the presentation of the awards.

Since there was no one available from the Xpedition flow, all eyes fell on me to accept the award, should we win. Now, I’m more of a support person, so either the other guys were bashful or they were throwing me a bone. Whichever, it was appreciated!

DesignCon Award Mentor Graphics Xpedition

I have to be honest and tell you that I think the DesignCon mascot is one of the goofiest I’ve seen, but it’s been going on for years, so maybe that’s just me. The whole idea of a mascot for electronic design and development is a bit odd anyway.

When the category of Board and System Design & Simulation appeared on the screen, it was clear that Mentor Graphics would win. Sure enough I felt a couple of friendly pushes and headed forward, where I got to shake hands with…yep, Chip Head. I had a great time accepting the award on behalf of the folks who actually did the work, and I’ll always treasure the photo of Chip Head and I.

Xpedition Enterprise wins a 2015 DesignCon Best in Design & Test Award

3 February, 2015

This is the fifth post in a series showcasing the winners of the 2014 Technology Leadership Awards. View the previous ones here.

Runner up for the Consumer Electronics & Handheld category: Wizlogix, Singapore

Wizlogix logo

Design: Modem and application processor

Design team: Vivian Ong Ai Lian, Tan Shean Huey, Romeo Pineda

Design challenges:

  • Traces/spaces at 2.36th with constraint areas under multiple FPGAs
  • High via density
  • Primary component was a 644-pin ASIC with .4mm pitch. HDI was necessary to maximize routing efficiency
  • High-speed constraints with impedance controlled, length matched differential pairs, with perpendicular biasing on adjacent layers
  • Common planes for all signals in the same bank are required; creating plane areas that are large enough to provide power to different critical banks under the main chip that is already filled with microvias without breaking into different fragments was a challenge

Wizlogix award-winning design for a modem and application processor

Design tools and team comments:

  • Xpedition® Enterprise
    • “We used automation with multi via rules to help us punch multiple vias at regular intervals and spacing.”
    • “We used the tuning tool to our advantage as well. It would have taken us a longer time to do the length matching if we had to estimate the lengths of each trace. The tuning tool within Xpedition gives us the actual length that we need and saves us time during checking.”

Judge’s comments

  • “The 644 pin BGA at 0.4 mm pitch provides a challenge to route this design in 12 layers.”

About the Technology Leadership Awards

Started in 1988, this program is the longest running competition of its kind in the electronic design automation (EDA) industry. It recognizes engineers and designers who use innovative methods and design tools to address today’s complex PCB systems design challenges and produce industry-leading products. See the full list of 2014 winners here.

28 January, 2015

This is the fourth post in a series showcasing the winners of the 2014 Technology Leadership Awards. View the previous ones here.

First place winner in the Consumer Electronics & Handheld category: Qualcomm, United States

Qualcomm Technologies Logo

Design: a Quad-core APQ (application processor Qualcomm) targeting the tablet/netbook market segments

Design team: Larry Paul, Sanat Kapoor, Stephen Baker, Danlin Xiang, Michael Tex

Design challenges:

  • Quad-core Krait, A320 3DGfx, Dual Channel PCDDR3/3L + LPDDR2 PoP option, integrated GPS SS w/Gen8A-Lite Nav core, 1080p HDMI Video, Media Processor, SATA Gen1, and PCIe 2.0
  • To maintain cost constraints, a through-hole 8-Layer stackup with no HDI layers needed to be used
  • Trace width dimensions of under 3th
  • Multidiscipline collaboration was utilized:
  • PCB Layout, Package & APQ were designed together with a co-design process and collaborated across the PCB, package and IC design teams
  • The power and signal integrity group helped with simulations and design feedback; multiple rounds of power simulations and memory simulations were needed to optimize the package and PCB routing
  • Design for reuse – the second memory circuit was designed to be copied and replicated; memory circuit can be single or dual ranked to support four memory banks
  • Eight DDR comps mounted four on each side; sharing thru via fanouts
  • 97 percent of the design was high-speed nets, with close to 9,000 connections

Qualcomm Technologies Technology Leadership Awards Winning Design

Design tools and team comments:

  • Xpedition® Enterprise and Package Integrator
  • Package Integrator is used at Qualcomm to help optimize pin definition on the APQ.
  • “Mentor’s Package Integrator tool allowed us to manage multiple rounds of signal assignment evaluation across teams without loss of data. The design was initially worked out in a co-design study through PCB Layout. Near completion the circuit placement and routing was copied to a customer reference design to re-use and quickly route 80% of the traces. This allowed us to build a product quickly and fabricate a working design with no design spins.”

Judge’s comments:

  • The intense activity around the RAM is very impressive.
  • Good team effort across multiple disciplines. This is a tight design considering that is utilizes standard technology instead of HDI.

About the Technology Leadership Awards

Started in 1988, this program is the longest running competition of its kind in the electronic design automation (EDA) industry. It recognizes engineers and designers who use innovative methods and design tools to address today’s complex PCB systems design challenges and produce industry-leading products. See the full list of 2014 winners here.

26 January, 2015

This is the third post in a series showcasing the winners of the 2014 Technology Leadership Awards. View the previous ones here.

Runner up in the Computers, Blade & Servers, and Memory Systems category: Sanmina, India.

Sanmina Corporation Logo

Design: a DDR3 240 pin RDIMM

Design team:

  • Damodhar Chakravarthy Mallisetty, Tom Thomas, and Birla Manoharan

Design challenges:

  • DDR3 240pin UVLP RDIMM 1333MT/S ECC 17.75mm 2R x4 10 layer Viking Stacked BGA
  • Using fly by topology and length matching within the time limit was a big challenge
  • Embedded resistors were used in layer three and no vias could be placed around the embedded resistors
  • No traces were allowed over the slot in this design
  • Placing components within the tight clearances was a great challenge

Sanmina Corporation Winning Design 2014 Technology Leadership Awards

Design tools and team comments:

  • Xpedition® Enterprise allowed for via keepouts for embedded resistors and fast routing
  • HyperLynx® was used to verify the signal integrity for the tuned address signals and keep them within the limits

Judge’s comments

  • Long thin boards can present serious design challenges and this design makes very good use of board real estate.

About the Technology Leadership Awards

Started in 1988, this program is the longest running competition of its kind in the electronic design automation (EDA) industry. It recognizes engineers and designers who use innovative methods and design tools to address today’s complex PCB systems design challenges and produce industry-leading products. See the full list of 2014 winners here.

19 January, 2015

Shortly after I graduated with my Associates degree in technical drafting, I entered the world of computer aided design. I trained in CAD technology on one of the very first computer design systems – CEADS CAD, and we young bucks could not wait to jump right into drawing designs on the computer screen.

Our teacher, a tall Texan with a big stern voice, told us that we might come across many CAD systems but that no matter what they could accomplish, they could not accomplish it without a quality library. These libraries would be the building blocks of our designs.

Since my CAD training stressed the importance of a good library to achieve quality designs, I have always trained the designers that report to me on the importance of a correct-by-construction PCB component library. Over the years, I have built thousands of the components used in designs, and trained many a librarian in the processes that make up a quality library.

Xpedition Starter Libraries

Just before I came to Mentor Graphics, I was given the task to create a component library and information database that would be used by over 400 design engineers in my company. It was a huge undertaking including over one hundred thousand records of component information that would be used to design and fabricate the designs of tomorrow.

First and foremost, the library had to be flawless in quality as to not create board errors, or errors in fabrication – the library currently in use was perilous to use. The new library had to be hands-off for the engineers. In other words, they needed to be able to request parts and walk away expecting to get exactly what they needed, correct the first time. Yes, a very daunting task!

So, with the help of my one librarian, and some old friends at Optimum Design Associates, we took on the task. Although it took over a year to complete the library (you see we were using it while we were building it), we completed it with fantastic results.

I am proud to say that to this day no Xpedition design using the library has ever failed due to a bad library component. This was always my goal as a designer.

We could not have done it without the library team, and my buddies at ODA, specifically Justin Parise. Their attention to library details and the knowledge of the needs of the PCB Design engineers is second to none. A quality library was what they promised, and it is what I received.

And NOW, with the release of Xpedition VX.1, you can have these same results.

With the latest release, users can download a FREE complete starter library created by my friends at Optimum Design Associates. You will get the same quality components that I received when working with them. Of course, you will not get hundreds of thousands of components, but you will get a great baseline library and component information database so your design team can hit the ground running.

Optimum Design Associates Logo

Download your very own building blocks to PCB design today!

Not an Xpedition user? PADS® users may download starter libraries here.

12 January, 2015

This is the second post in a series showcasing the winners of the 2014 Technology Leadership Awards. View the first here.

First place winner in the Computers, Blade & Servers, and Memory Systems category: Seagate Technology, United States.

Technology Leadership Awards_Seagate

Design: The team used all of the “tricks in the book” to achieve placement and routing within the speed/timing parameters on their mid-range enterprise solid-state drive.

Design team:

  • Andre’ Dutko, Keith MacLean

Design challenges:

  • This was a heavily constrained design with a high percentage of high-speed nets; over 64,000 constraints in the design and lots of restrictions due to PCIE, DDR3 and Flash. Tight length matching to balance byte lanes; isolation of multi-GHz signals; layer count and thickness restrictions.
  • Adjacent layer coupling and reference plane impact on SI required extensive collaboration between layout designer and project engineer.
  • Power distribution for 37 voltages with current ranging from 0.5 – 5.0 amps.
  • Buried vias were avoided as a cost consideration.

2014 Technology Leadership Award Winner Seagate_Design

Design tools and team comments:

  • Xpedition® Enterprise flow and Hyperlynx®
  • The 556 pin BGA/SOC was the most complex component. Beyond the multiple power supplies required, it is driving two DDR3 chips and 16 (back-to-back) NANDs. All of which had separate byte lanes containing unique Data, Command and Control and/or Address.
  • High volume manufacturing requirements with multiple variants also added to cost considerations.

Judges’ comments:

  • This design has very high lead density due to innovative side-side placement and routing of the memory.
  • This is a tight design considering that is utilizes standard technology instead of HDI. I like the way they utilized the various tools within the flow to achieve design requirements.

About the Technology Leadership Awards

Started in 1988, this program is the longest running competition of its kind in the electronic design automation (EDA) industry. It recognizes engineers and designers who use innovative methods and design tools to address today’s complex PCB systems design challenges and produce industry-leading products. See the full list of 2014 winners here.

9 January, 2015

As you may already know, the Xpedition VX.1 release is now available to customers. I encourage you to take some time to evaluate it because if there is one thing to mention about this release, it is that you will be able to increase your productivity significantly. It can be downloaded at SupportNet.

We have added some new interactive routing styles that complement the existing ones quite well. The differences between these styles are found in the amount of automation applied to the action, and the type of user control. Looking at Editor Control/Plow, the methods are listed:

PCB Routing Solutions Editor Control Plow methods

You can set a style for routing with the Mouse Up (clicking when needed) and for the Mouse Down (dragging as you route). I recommend trying the default style using Real Trace for a couple weeks to really get a good feel for its value.

Real Trace Plow

This is the new functionality. Real Trace is what can be called a “One-Click” interactive router. All you need to do once you are in Plow mode is to click on a route object and start routing. The trace is added as you move your cursor – no need to click again. It even finishes the route automatically when it gets close to the end of the netline. Watch this video to see in detail.

Delayed Option – This option allows you to delay the application of push & shove until the trace being added is in an open space. Why? We have found that by waiting to apply the push & shove, the quality of the traces being pushed is much better because we consider a longer length of trace and smooth it and those little unnecessary jogs are eliminated.

Dynamic Option – With this style, push & shove is applied dynamically as the trace is being added. You might be thinking, after I described the value of the Delayed option – why would we come back and enable you to have the push & shove done dynamically? Sometimes it is desirable to immediately see how a trace will fit through a tight area. The good news is that all you have to do is hold down the left mouse button and push & shove will be applied as long as you are dragging. Rumors that the push & shove is more effective if you press harder on the mouse button are not true; however, I do understand that sometimes this method may be useful to release some pent-up emotions during stressful days.

The Hockey Stick style works as it has in previous releases; however, the Local Gloss has been improved significantly to provide higher quality routing. For those who want to click-click-click-click to create every segment, the Segment style for ultimate control is still available.

Other New Items

Active Clearances – This feature dynamically displays a shadow around objects that shows you the design rule clearances to the trace being plowed. This is especially useful when Plow fails and it is not easy to understand why.

PCB Routing Active Clearances 1PCB Routing Active Clearances 2

Fixed & Locked Patterns – You can now set your own patterns for fixed and locked objects in the Display Control / Graphic tab.

PCB Routing Fixed and Locked Patterns

Route Object Appearance – Another feature that may be useful is the ability to set a specific pattern on general Traces, Pads and Plane Data. This is also on the Display Control / Graphic tab.

PCB Routing Route Object Appearance

Conclusion

As time goes on, we continue to make both big and small enhancements to our design tools. Many of the enhancements are driven by customer requests and we often go out-of-the-box with things like the Sketch Router.

What do you think would be a good improvement in our interactive routing tools? Maybe it has already been done in the Xpedition VX.1 Layout product and all I need to do is show you where it is.

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