Synthesizing Hardware Assertions and Post-Silicon Debug

At the 2012 Design Automation Conference, I had the pleasure of moderating a panel at a workshop titled “Post-Silicon Debug: Technologies, Methodologies, and Best-Practices.” This workshop brought together a collection of experts from industry, academia, and EDA to discuss the emerging challenges and solutions associated with post-silicon validation. The speakers presented different instrumentation strategies, as well as methods of using data collected by the debug logic to facilitate fast and efficient debug.

Performing verification on real silicon introduces a number of new and unique challenges. On the one hand, real silicon offers great execution speed, which enables a long test run that reaches deep into the design’s state-space. On the other hand, real silicon lacks both good controllability and observability, which serve an important role in pre-silicon verification. Assertions, which have always been one of my passions, have been shown to address both the controllability and observability challenges associated pre-silicon verification (for example, RTL simulation). And now, there is emerging interest in addressing these same challenges in post-silicon validation.

I’d like to invite you to check out my Tech Design Forum article titled Synthesizing assertion into hardware for faster debug.   Obviously, synthesizing hardware assertions is only one of many new solutions that are currently being explored to contain the growing cost and effort associated with post-silicon debug. One attractive benefit of assertion-based techniques is that they provide a nice natural link between pre-silicon verification and post-silicon validation, in terms of reuse.

I’d like to hear your opinions concerning synthesizing hardware assertions, as well as post-silicon debugging challenges in general.

Post Author

Posted July 27th, 2012, by

Post Tags

, ,

Post Comments

1 Comment

About Verification Horizons BLOG

This blog will provide an online forum to provide weekly updates on concepts, values, standards, methodologies and examples to assist with the understanding of what advanced functional verification technologies can do and how to most effectively apply them. We're looking forward to your comments and suggestions on the posts to make this a useful tool. Verification Horizons BLOG

@dennisbrophy Tweets

  • Loading tweets...

@dave_59 Tweets

  • Loading tweets...

@HarryAtMentor Tweets

  • Loading tweets...

Comments

One comment on this post | ↓ Add Your Own

Commented on August 1, 2012 at 10:17 am
By Blog Review: Aug. 1 | System-Level Design

[...] Harry Foster jumps into synthesizing assertions in hardware, which has been done by many companies using their [...]

Add Your Comment

Archives