What do you mean by mandatory?
TSMC and Mentor Graphics recently held a joint Marketing seminar (06/25/09) for mutual customers to go over the new DFM requirements at 45/40 nm. (In my first post, I mused about the implications of making some DFM analysis steps mandatory.) When the presentations at the seminar ended, and the Q&A began, two customers basically asked the same question, “What do you mean by mandatory?” Of course, TSMC wasn’t going to stand over them and say, “Mandatory means mandatory, what part of mandatory don’t you understand?” :=) TSMC admitted that they haven’t changed the tape-out checklist to forcibly include the DFM checks (CMP and LPC). This is what begs the question, what do you mean by mandatory?
What it really comes down to is this: if you tape out without these checks at 45/40 nm, you are taking a risk. If the design has yield issues and you didn’t run these checks, TSMC might wave the design off and insist that you take ownership of the yield issues. This is a huge risk. If the part comes out and has zero yield, and they find out it’s because of a level 1 hotspot in litho, or bridging due to CMP that you didn’t check for, then you have to eat the cost of a respin. Most design teams doing large designs count on a certain number of respins before full production anyway, but to have to do one before you have any functional parts is a disaster. If you get parts that yield, but yield poorly, it can be just as bad, because these things can take a long time to find using traditional Low Yield Analysis, or FA. As someone who once had to re-spin a custom design due to a flaw in the incoming spec, the worst thing management can ask you before a re-spin is, “Are you sure that’s all that’s wrong with the design?” That one is guaranteed to cause sleepless nights.
TSMC pointed out that they have very little history on the 45/40 process at this time. This means there might be yield issues, and there is a definite need to do DFM analysis at this point in time. TSMC also pointed out that DFM analysis might not be mandatory once the process is considered stable. I think that by that time, the next process node will be in the hands of the early adopters, and DFM will be mandatory for that node, so the need for DFM won’t be going away anytime soon. According to this article and this article on the web, the yield issues are real. Considering the total cost of developing a chip in 45/40 nm and the risks of really low yields, DFM tools seem like cheap insurance.
Conclusion? Buy DFM tools from Mentor Graphics. You’ll sleep better. :=)
- Why are 450mm wafers and EUV lithography related?
- TSMC 28nm yield (SemiWiki)
- DAC 2011 is upon us!
- You can’t give stuff away fast enough
- Critical Area Analysis and Memory Redundancy
- Economy must be improving
- TSMC loses some production time due to earthquake
- DAC: Veni, vidi, steti
- What do you mean by mandatory?
- So, why not just write better rules?
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