Analog Modeling – Part 2

In Analog Modeling – Part 1 I reviewed the importance of equation selection in the analog modeling process. In a nutshell, the first step in getting good simulation results is choosing equations that best describe the behavior or device you want to analyze. Your analog equation set could be as simple as a single transfer function describing the relationship between the inputs and outputs of a block, or as complex as the set of mathematical relationships characterizing a detailed motor model. Regardless of the complexity, turning your set of equations into a viable simulation model may seem a bit daunting. Like most engineering tasks, however, if you establish and use a proven process, even the most complicated task is reduced to a simple set of practical steps. For analog modeling using a general hardware description language (HDL), I recommend the following process flow:

  • Decide what you want your model to tell you about the device (hint: you may want to know more than the standard equations tell you)
  • Derive the characteristic equations and relationships for internal and external variables to calculate the information you want to know
  • Implement the equations and relationships using syntactically correct statements based on your modeling language choice
  • Declare and define appropriate objects to support your model statements

Before discussing the details of these steps, it’s worthwhile to understand how a model is structured in the HDL you plan to use. For this post, I’ll describe the general structure for a model written in VHDL-AMS. Keep in mind that model structures for other languages may differ a little…or a lot.

A typical VHDL-AMS model has two parts: an Entity and an Architecture. Each has a specific purpose. A VHDL-AMS Entity defines the parameters you can adjust to tune your model’s behavior, and describes how the model connects to other elements in a system. For example, here is the Entity for a simple resistor:

   entity resistor is
     generic (
        resistance : real := 100.0);
     port (
        terminal p1, p2 : electrical);
   end entity resistor;

The Generic section establishes a parameter called “resistance” and sets it to a value of 100. The Port section names two terminals, “p1″ and “p2″, and defines them as electrical in nature, meaning simulation results will be stored using electrical units. Any performance definition for this resistor model must be related to these two terminals.

A VHDL-AMS Architecture defines how the device operates, and connects the operation definition to the information in the model Entity. Here is a sample Architecture for the resistor model:

   architecture ideal of resistor is
      quantity voltage across current through p1 to p2;
      voltage == current * resistance;
   end architecture ideal;

This simple Architecture implements the device equation (in this case Ohm’s law) in VHDL-AMS syntax, and defines how the equation relates to terminals p1 and p2 in the Entity. Notice that the equation

   voltage == current * resistance

is very similar to the textbook definition of Ohm’s Law: v = i * r. The “quantity” statement defines how the “voltage” and “current” elements in the equation are associated with terminals p1 and p2. In this case, voltage is calculated across, and current through, the terminals. Knowing how to structure a model for a particular HDL simplifies the modeling process.

With this brief introduction to VHDL-AMS model structure, we can add some detail to our modeling process discussion. In my next post I’ll give some pointers on deciding what details you need to know about a device.

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Posted February 2nd, 2012, by

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