Thermal testing: measuring the real world

14 March, 2011

Well, the Christian world needs to wait a couple of more weeks for Easter to come. But the lent of the semiconductor thermal management community is close to finish – at least after a long period of my silence here – since I am writing a new post again. And the reason is that we are facing a very busy week: for the semiconductor thermal management community the week between 20 and 26 March will be like the Holy Week…

For us this will be the week of SEMI-THERM - the 27th annual IEEE Semiconductor Thermal Management Symposium. The organizers, SEMI-THERM and MEPTEC call it the 2011 Electronics Thermal Week.

There will be great many activities – and many of them will be related to some extent to the most recent JEDEC thermal measurement standard JESD51-14 titled “TRANSIENT DUAL INTERFACE TEST METHOD FOR THE MEASUREMENT OF THE THERMAL RESISTANCE JUNCTION-TO-CASE OF SEMICONDUCTOR DEVICES WITH HEAT FLOW TROUGH A SINGLE PATH”. First of all, SEMI-THERM starts with a short course by Dirk Schweitzer and Heinz Pape from Infineon which will deal with the details of this method – the principle of which was briefly described in my prior blog post “A transient in methods: the RthJC transient method“. The short course is titled Transient Rth-JC Measurement and Compact Thermal Model Generation and will take place on the 20th of March in the Doubletree Hotel in San Jose, CA. (Find more details about this in the Advance Program of SEMI-THERM.)

The principle of the transient RthJC measurement - as shown in the JESD51-14 standard

The principle of the transient RthJC measurement - as shown in the JESD51-14 standard.

On the 21st of March events continue with The Heat is On seminar organized by MEPTEC. I have the honor to contribute to the technical program of this seminar with a talk on thermal standardization activities of power LEDs. I will present an update of the paper I presented last time at the 2010 SPIE Solid-State Lighting Conference in August 2010 in San Diego. This time further thermal transient measurement results performed during LM80 tests of LEDs will be shown (after 6000+ hours of testing time have elapsed) and problems related to thermal impedance of AC driven LED light sources will also be raised.  Technical details regarding the measurement of the AC thermal impedance of LEDs will be discussed in our common technical paper with Bernie Siegal from Thermal Engineering Associates - to be presented in the LED session of the SEMI-THERM conference (session 14, 24th of March, 11:10 am).

Structural degradation of an LED and TIM ageing as shown by structure functions taken during LM80 tests performed at the University of Pannonia (Veszprém, Hungary).

Structural degradation of an LED and TIM ageing as shown by structure functions taken during LM80 tests performed at the University of Pannonia (Veszprém, Hungary).

CFD simulation results for a retrofit AC LED lamp being tested in an integrating sphere having a plastic wall.

CFD simulation results for a retrofit AC LED lamp being tested in an integrating sphere having a plastic wall.

LED and TIM testing news along with advance information about our implementation of the JESD51-14 RthJC measurement standard will be discussed at Mentor Graphics workshops during the SEMI-THERM exhibition which will take place in the afternoon, on the 22nd and on the 23rd of March. During the workshop on the 23rd of March not only testing and product news will be provided but I shall also show how TIM testing and JESD51-14 compliant transient RthJC measurements are related and how such RthJC measurements can support test based compact modelingof power semiconductor packages, including power LEDs. The good news is that this test based compact modeling option bridges the gap between thermal testing and simulation. In Mentor Graphics terms: builds a bridge between our flagship products FloTHERM and T3Ster. This bridge realized by the T3Ster-Master program. So far so good. If you are interested in more details, please come and visit our workshops. Yes, not only the workshop related to thermal testing, but also the FloTHERM workshop that will be given by my acknowledged colleage from the CFD world – Robin.

The new T3Ster-Master program is a powerful tool to support test based compact modeling. It uses the new JESD51-14 RthJC measurement standard to find the case node of a package model to be propagated towards FloTHERM.

The new T3Ster-Master program is a powerful tool to support test based compact modeling. It uses the new JESD51-14 RthJC measurement standard to help finding the case node of a package model to be propagated towards FloTHERM.

The highlight of the week is always the Awards Luncheon of SEMI-THERM, where the annual THERMI Award and the Harvey Rosten Award are presented. This year everything is around the new transient measurement standard. Well, not quite like this but still. This year’s reciepent of the Harvey Rosten Award for excellence is Dirk Schweitzer  for his paper “The Junction-To-Case Thermal Resistance: a Boundary-Condition-Dependent Thermal Metric, presented at SEMI-THERM 2010. And then excitement comes: who wins this year’s best paper award of SEMI-THERM… It’s like the Oscar’s Gala in LA. That’s what we’ll learn on the spot…

On the 25th of March the 2011 Electronics Thermal week concludes with the regular meeting of the JEDEC JC15 committee on thermal standardization of packaged semiconductor devices. Among many things the LED testing proposals will be discussed…

So, we are facing a really busy and exciting week. Last, but not least: besides the seminars, workshops and technical papers you can also learn about Mentor Graphics’ thermal testing and simulation technologies if you visit us at our booth during the exhibit hours at SEMI-THERM. Come, and see us in the Doubletree Hotel in San Jose next week!

See you there: András

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21 December, 2010

I have always admired the medical diagnostic tools, especially imaging. X-rays have a long history, starting with Conrad Röntgenback in the 19th century. In fact in Hungary x-raying is called “röntgening” – yes, like this; the phrase became part of our language as an ordinary word; both as a verb (to take somebody’s x-ray image) or as an adjective to specifically name this very high frequency range of electro-magnetic radiation, for example. Computer tomography (CAT-scan as usually called in English speaking countries) is a real miracle of the late 20th century science and technology. The idea is that if x-ray images of the human body are taken from different angles around the axis of the body in small increments and the resulting series of the 1D projected x-ray images of a given cross section of the 3D body are post-processed, then it is possible to generate complete 2D images of cross-sectional cuts of the body. The image below was actually taken from my body 17 years ago. (At that time the images were photographed to an x-ray film, rather than saved on any long term computer storage media – remember, this was still the era of the 1.44M 3.5″ floppies; pen-drives, magnetic or optical storage with gigabytes of capacity were not yet available. So, I just re-digitized from the film one of the images my body’s cross sectional cuts and greatly reduced the pixel-count in order to be able to share this image here.)

A computer tomography image from 1993

A computer tomography image from 1993

Reconstruction of such images from the projections is possible with the help of some calculus using the Fourier-transform. (Now I do not want you to get bored – interested readers can find the principles of the calculations in lecture notes of graduate image processing courses, such as Vladimir Székely‘s KÉPFELDOLGOZÁS (Image processing) at the Budapest University of Technology and Economics, Faculty of Electrical Engineering and Informatics, but perhaps e.g. the book of Wim van Drongelen - Signal Processing for Neuroscientists - provides a real, comprehensive description of the topic.) Anyway, at the moment the great French scientist, Joseph Fourier is very important for us from the point of view of this story . Besides establishing the Fourier-series expansion for approximating functions in mathematics he also contributed to physics a lot, especially in the study of vibrations and in heat-transfer. The basic equation of heat-conduction is also known as the Fourier-equation. 

Of course one may ask, how thermal analysis of semiconductor device packages – the main topic of this blog - and non-destructive analysis techniques like X-raying or CAT-scan are connected? In  fact in thermal testing we also have a non-destructive analysis method. If one applies a sudden, stepwise change of the heating power and one measures the transient reponse of the junction temperature, one obtains every available information about the junction-to-ambient heat-flow path of a semiconductor package. (Here the word ‘ambient’ may represent any kind of standard test environment such as a JEDEC standard still-air chamber or a cold-plate; in this post I do not want to deal with details of test environment). So, back to the thermal transient testing: in a basic ‘signals and systems’ course for EE-s the mathematically pure representation of the sudden, step-wise change of the heating power as EXCITATION is called the Heaviside-function, and the RESPONSE of a linear system is called the unit-step response function.

In thermal transient testing the JEDEC JESD51-1 standard describes how such a sudden change of heating power of a pn-junction (a semiconductor diode) can be achieved and the same standard also defines two methods with which the junction temperature transient – as a response to the change of powering – can be measured. With Mentor Graphics’ T3Ster equipment we implemented the so called static test method – but again, this is not the main point of discussion in this blog post.

Until 1988 junction temperature transients were measured but there was no widely published and widely used method of extracting the information hidden in the measured junction temperature transients. The great breakthrough was Vladmir Székely‘s work with his PhD student, Tran Van Bien in 1986-1989. This was the era, when all the theory of the so called NID method (network identification by deconvolution) and the concept of structure functions was born. (Yet another scientist who’s name is connected to different fields of engineering – image processing on one hand and thermal problems of semiconductor devices on the other hand…). The first, original paper on the topic was published by prof. Székely and T. V. Bien in Solid-State Electronics in 1988 (“Fine structure of heat flow path in semiconductor devices: A measurement and identification method“, doi:10.1016/0038-1101(88)90099-8) – since then this paper is the basis of any study dealing with thermal transient measurement based structural analysis of semiconductor device packages and thermal management solutions.

 

In case of DELPHI DCP1 boundary condition structure functions are projections of the heat-flow path 'rom the face'.

In case of the DELPHI DCP2 or DPC3 bondary conditions we take projection from one side towards the other.

 

In case of DELPHI DCP1 boundary condition structure functions are projections of the heat-flow path 'rom the face'.

In case of the DELPHI DCP1 bondary condition we take projection from the face towards the back.

Life is becoming more complicated, if there are multiple heat-flow paths from the chip’s junction towards the environment. Typical examples are the large area IC packages where heat leaves the package through the large top surface of the package as well as through the leads of the package or even through the bottom surface of the package when e.g. underfill is also applied during the assembly. In such situations what we measure during thermal transient testing is the net thermal impedance of all these parallel heat-flow paths. If this is the case, it is really hard to create compact thermal models for the packages. Therefore in the DELPHI project of the EU hard thermal boundary conditions were defined: the top/bottom surfaces of the package under test have to be directly attached to a cold-plate while the other surface is left ‘intact’. This way the majority of the heat-flow is directed through the actual package surface which is attached to the cold-plate. All together there are four different test cold-plate configurations defined in DELPHI. Since dual cold-plates were used in DELPHI, these conditions are abbreviated DCP1, DCP2, DCP3 and DCP4. In the DELPHI project only the steady-state characterization and compact modeling was the target. It was the PROFIT project of the EU in which the dynamic characteristics of semiconductor device packages were studied, using the DCP1, 2, 3 and 4 test conditions – and structure functions were used to represent the properties of the given heat-flow path by means of thermal resistance and capacitance values.

Now, one may ask, what are the structure functions? There could be many answers to this question. A very academic answer is that structure functions mean an alternate representation of the junction-to-ambient thermal impedanceof a packaged semiconductor device. Another, more practical answer is that structure functions provide thermal capacitance – thermal impedance maps of such heat-flow paths. In other words: with the help of structure functions we can identify which major element of the heat-flow path has how much thermal capacitance and thermal resistance. If the heat-flow follows an essentially one-dimensional path, there is a one-to-one correspondence between thestructure functions and the actual structural elements of the heat-flow path.

Essentially 1D covers a lot – this definition does not restrict the structure functions to really one-dimensional features like a thin, long rod. A heat-spreading showing a really three-dimensional pattern in the Euclidian space may also be considered as a 1D spreading, if there is a coordinate transformation with which the spreading can be mapped to 1D function. (Yet another connection between the real 3D world and its lower dimensional projections…). Radial spreading, cylindrical spreading or conical spreading are the most obvious cases of such essentially 1D heat-flow patterns. In most power semiconductor devices packages we find essentially 1D hear-flow from the chip towards the ‘ambient’.

The DCP1, 2, 3 conditions and application of the structure functions as non-destructive means of structural analysis of packages very much reminds the X-ray/CAT scan technique of medical diagnostics. We have just one projection of the complex 3D structure of an IC packages, but in the direction where the heat flows we can see all the details of the heat-flow path, as if we have “X-rayed the package”. We hardly can recognize the bonding wires – neither can doctors see the capillary veins of the body. But if there is a die-attach void for example, it can be well detected, just like a broken leg for example which is clearly visible even on conventional X-ray images. Measuring with the different DCP setups of DELPHI/PROFIT, one can have Rth-Cth distribution snapshots of the package body from different directions – just like in CAT-scan. Research is still needed to find ways of reconstructing package models from structure functions measured under different test conditions, but I sincerely believe, one day we’ll have the solution. When this day arrives, we can celebrate the birthday of something which resembles ‘thermal CAT-scan’.

At this point let me wish a merry Christmas now to all of my patient readers who continued digesting this post. Last Sunday I lit the 4th candel on the Advent-wreath (see my previous blog post) and in 2 days I will light my LED string on our Christmas tree – as in Hungary we celebrate Christmas in the evening of the 24th of December – the holy night. Therefore I say good bye to everybody – until the next year when I will continue this topic.

Best regards: Andras

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5 December, 2010

Today is the 2nd Sunday of Advent. I am preparing for Christmas. Since my childhood I have been really fond of Christmas-trees and candles on the tree. But my father has always been afraid of fire, therefore candles were lit only when my parents were present. It changed  with the strings of  bulbs. They introduced a new game: when decorating the tree, one had to test the string since the low voltage bulbs were connected in series – the overall voltage drop of the string was equal to the voltage of the mains (230V in Europe). Instead of having a switch installed in the string one of the bulbs was loosen to cut the circuit (simple but sometimes dangerous practice). But after a year, when next time we decorated the Christmas-tree we never  knew which bulb was the lose one. With the bulb strings the immediate danger of fire was gone. But still one had to be afraid of possible fire, since the surface of the bulbs was hot and after a couple of days a real tree (my favorite is silver fir) in the warm house gets dry, gets flammable. So, even with a hot bulb touching the fir we easily create work for the firemen. But I can not help liking a silver fir being illuminated all the time between Christmas day and New Years Eve…

x-mas-tree3

Bulbs and candles to be completely replaced by LEDs on any Christmas-tree.

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The entire history of lighting industry: from candles to LEDs.

This year I wanted to have something cool for Christmas. So I ran into my corner shop (which happens to be an electronics shop) and I just invested 40$ into my long-wished LED lights for Christmas. I immediately opened up the box and added the LED string to the Advent-wreath. Since it is the 2nd Sunday, two candles were lit, plus the LEDs. (Yet two weeks to wait for my favorit silver fir…) And I could not resist to take a photograph which illustrates the entire history of artificial lighting: from candles to LEDs.

By using LED strings cities can save a lot on their Advent lectricity bills. In 2010 Budapest also decided to install LEDs on their street-lighting poles as shown here on Vörösmarty square, where Europe's nicest Advent market takes place.

By using LED strings cities can save a lot on their Advent electricity bills. In 2010 Budapest also decided to install LEDs on their street-lighting poles as shown in this photograph taken on the Vörösmarty square, where one of Europe's nicest Advent markets takes place. (Source of image: nlcafe.hu)

Yes, LEDs are really cool. By all means. They can be easily controlled and by using LEDs one can save really a lot of energy. Unfortunately strings of colored LED are all blinking – a bad application of the simple control of LED lights. I simply can not stand this color changing, so I am sticking to warm white (CCT = 3000K) LEDs which very much resemble the real candles. But they are cool. And since they are cool they will not create fire - this year I should not worry putting fire on the Christmas-tree, only the candles of the advent-wreath mean some risk.

Getting rid of the danger of fire at Christmas is not the only reason why we may like cool LEDs. The cooler the LEDs are – the less energy they consume to provide the same amount of light. And not only their energy conversion efficiency increases when their junction temperature is kept low, but their expected life-time becomes also longer. This means that one really has to pay every effort to make sure that LEDs remain cool when they are used in a luminaire. So, good and reliable thermal design of LED packages as well as good design of the thermal management of LED-based lighting solutions is a must.

Energy conversion efficiency of LEDs drops with increasing temperature.

Energy conversion efficiency of LEDs dropswith temperature.

Expected lifetime of LEDs also drops with increasing temperature.

Expected lifetime of LEDs also drops with increasing temperature.

On one hand we have to make sure that the different thermal interfaces of an MCPCB assembled LED are good: there is no voiding in the LED die attach for example or the LED package does not delaminate from the MCPCB substrate. On the other hand, when such an LED assembly is built into a retrofit LED lamp (nowadays also available in electro-shops), one has assure that the housing of the lamp (the LED luminaire) is capable of transferring all the heat generated in the LED chip to the surrounding air and the air’s natural convection provides sufficient cooling.

Thermal transient testing helps qualify the LED packages, including all the thermal interfaces in the heat-flow path from the LED chip’s PN-junction down to the bottom of the MCPCB substrate. In order to end up with the true thermal resistance of the LED package or the entire LED assembly the usual JEDEC JESD51-1 complient thermal test (static test method) has to be combined with the measurement of the LED’s total emitted light flux. Measurement of the light output metrics of LEDs of course have to be carried out in compliance to the CIE 127:2007 document. If you are interested in details about comprehensive testing of power LEDs, I recommend  to have a look at my prior webinar titled LED Thermal Characterization Made Easy which is available as video on demand from Mentor’s web-site, or read an article about this in the SPIE Digital library. General issues of thermal interfaces and thermal interface materials are key to LED reliablity as well, as it has been demonstrated in a recent publication about thermal diagnostics options of LED-based street-lighting luminaires. (In this paper T3Ster and FloTHERM studies on LED street-lighting luminaires and LM80 tests completed with thermal transient testing are described.) Further details on connection between reliability and TIM testing was provided by Andris Vass-Varnai in his very recent webinar. (You my listen to Andris and Ian Clark in person at a tech day in Bangalore on the 7th of December.)

CFD analysis of an MR16 retrofit LED lamp in a JEDEC standard still-air chamber.

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Structure function of the LED assembly of the MR16 LED lamp measured in a JEDEC standard still-air chamber.

If one is interested in thermal issues of LED-based lighting systems and luminaires, CFD simulation is the right analysis method to use. If you think of the thermal time-constant of a large street-lighting luminaire for example, it will be in the order of magnitude of hours. It is not just question of pure physical testing time that would be required. For the physical testing one needs a prototype of the luminaire. To study different what-if design scenarios by physical testing does not pay off in this case. Virtual prototyping and CFDanalysis would be the right approach in such cases. In the figure above I just show a simple example – an MR16 LED retrofit LED lamp. It has been both measured and simulated with Mentor Graphics’ T3Ster equipment and FloEFD M-CAD embedded CFD simulation tool. The physical testing time in this case required about 1h – measurement took place in a JEDEC standard still-air chamber. In case of larger luminaires different design variants can be studied by the system level designer in his M-CAD system. Various examples for such studies were shown by my colleagues in their webinar titled Demystifying LED Design for Everyday Applications with Concurrent CFD and in another webinar titled Design for Longevity in Your Power LED Products.

I think, our simulation and testing tools are really cool – use them to make sure, your LEDs remain cool. LEDs do something cool together – any time, not only in the Advent period.

Best regards: Andras

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25 November, 2010

I guess, many people who had to find the metric  known as “theta-JC”  have asked themselves the question great many times: how to measure junction-to-case thermal resistance quickly and accurately

So did my colleagues at MicReD back in 2004/2005 when they had to do contract measurement of over 80 power transistor packages. The usual answer is: read the relevant standard – such as MIL-883 or SEMI G43-87. Well, this answer did not help them. The thermal resistance of the packages they had to measure was in the order of magnitude of 0.5 K/W. In this range the uncertainty of the measurement results caused by inherent problems of the above old, steady-state standards was in the same order of magnitude – resulting in errors of 80-90%. What were the major issues?

The MIL standard for example requires the measurement be carried out on a cold-plate. Usually some kind of a thermal interface material (TIM) is applied between the case surface of the package and the cold-plate. The problem of this is, that the applied TIM’s thermal resistance also contributes to the RthJC value measured this way. And this contribution depends on many different factors (the thermal conductivity of the TIM itself, its thickness, viscosity, pressure)  which are very hard to standardize. These factors have never been treated in any thermal testing standard yet. Not having been standardized would not have been an issue if these uncertainties had not affected the accuracy and the repeatability of the results. But they did – to a great extent.

The other major problem with the above classical RthJCmeasurement standards is that they require the case temperature being measured by a thermocouple placed to the hottest point of the case surface. But where is this hottest point? Can thermal testing managers expect their technicians who perform the actual measurements to locate these spots e.g. by means of an IR camera? Of course not. So, the rule of thumb is to try to hit the middle of the case surface. Well, the problem again is that a little misplacement of the thermocouple causes big measurement errors and results in poor repeatability of the measured data. And another aspect is that one should not “try to hit”. A “trail-and-error” procedure is not good at all – even if it has been standardized for decades. If the goal is to provide data sheet values for a semiconductor vendor’s parts then the measured thermal metrics have to be reliable – that’s the interest of the end-users of the components. Having reliable and precise values for data sheets is also the primary interest of the component vendors. For example in case of power semiconductors a lower junction-to-case thermal resistance is among the unique selling points – creating a battlefield between the package designers and the marketing team. Of course I am speaking about honest companies – where a product is always accompanied by a real data sheet rather than by a data cheat.

So, we had to prove by our own measurements that the power packages we were contracted to measure really had the smallest thermal resistance. Overestimating the junction-to-case value destroys the unique selling point for the company. And it may happen if to much of grease is applied and its thermal resistance appears in our measured values. Underestimating the value is also a problem: if too small RthJCvalues are published by the vendors they end-users might overheat the devices which will burn out. Again, it is a reliability issue and perhaps results in many cases being filed at different courts. I have used the word “estimation” twice – I simply could not find any other word for a situtaion where repeatability of the measurements is poor, the measurement error is high since you have to “hit” the hot spot. So, my colleages were trapped.

rthjc1-small 

Two junction cooling transients measured for two different qualities of the thermal interface between the package CASE and the heat-sink.

The way out from the trap was a genius trick: using a transient measurement method and structure functions in a smart way. The idea is very simple: apply the physical setup as suggested by the MIL 883 standard but measure the transient of the junction temperature only after the dissipation of the semiconductor device is cut off abruptly. Record this transient very accurately. Then change the quality of the junction-to-heatsink heat-flow path at the case surface of the package. Originally my colleagues inserted a sheet of thermal insulator layer – either a thin piece of Mylar or just a ceramics plate. With this second physical arrangement they did a second transient measurement. Then the differential structure functions have been derived from both measured junction temperature transients. The heat-flow path structure was changed at the CASE, so any change between the two structure functions should exactly indicate where the CASE of the package is in terms of thermal resistance. So, the thermal resistance value where the two structure functions start deviating is the junction-to-case thermal resistance. Really simple, isn’t it. This method - which since then is called the transient dual interface method – was first published at SEMI-THERM in San Jose in 2005. And this paper (later published in IEEE Tr. on Components and Pacckaging Technologiesr)  was distinguished by the best paper award of this conference. (Find the original paper in this list).

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The structure functions differ from the point where the physical structure was changed. This indicates the CASE surface and the reading from the horizontal axis provides the RthJC value.

Well, this is all history. The present NOW is, that 5 years after the method was invented, it got standardized by JEDEC. Actually, Dirk Schweitzer, one of Infineon’s acknowledged thermal engineers made a great job in assessing the method. He performed analysis of lot of different cases: different kinds of package types with different die attach solutions were studied and got published by Dirk. And at the end of the day, a new standard was created. The JEDEC JC15 committee made also a great job: before the ballot a round-robin test was organized among companies who delegated members to the committee to confirm the applicability of the proposed standard. And since Tuesday, 23 November 2010 we have the new JEDEC JESD51-14 standard. Find below JEDEC’s original announcement about this: 

ANNOUNCEMENT OF AVAILABILITY OF JEDEC DOCUMENT http://www.jedec.org/sites/default/files/docs/JESD51-14.pdf

JEDEC announces the release of, JESD51-14, TRANSIENT DUAL INTERFACE TEST METHOD FOR THE MEASUREMENT OF THE THERMAL RESISTANCE JUNCTION-TO-CASE OF SEMICONDUCTOR DEVICES WITH HEAT FLOW TROUGH A SINGLE PATH, published November 2010. This document is now available free of charge on the JEDEC website at:

This document specifies a test method (referred to herein as “Transient Dual Interface Measurement”) to determine the conductive thermal resistance “Junction-to-Case” RθJCJC) of semiconductor devices with a heat flow through a single path, i.e., semiconductor devices with a high conductive heat flow path from the die surface that is heated to a package case surface that can be cooled by contacting it to an external heat sink.

Ask me for example if you are interested how to implement this standard with Mentor Graphics’  T3Ster equipment and the T3Ster-Master data analysis software. Believe me, it’s a great fun!

Best regards: Andras

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16 November, 2010

I never thought I would be a daily blogger, but after having read Nazita’s entry on the Quantas/A80/RR  case I realized we can put our own house in order first (this is the equivalent of of the Hungarian proverb “Mindenki söpörjön a saját portája előtt” meaning, we have to care about our own responsibilities). Well, Nazita speaks about faith. I agree, faith is important, for example when I do my yoga exercises I also believe yoga helps me a lot. I believe, because I feel its positive effects, but I do not know, how it works exactly. When designing electronic systems, faith alone does not help. One needs real knowledge about the behavior of the system that will be manufactured – and in cases like the above quoted incident, life of hundreds of people may depend on it: think of fly-by-wire for example. In this particular case onboard safety system helped detect the problem and take corrective action. Thanks G (and the designers), these systems did not fail end helped safe landing of the aircraft.

In general, we do not want onboard electronics of any aircraft to fail. This is just one example of safety critical systems where high level of reliability is a must. There are similar needs in the automotive industry for example. The everyday use of the electric cars is not yet here but electronics is vital for today’s conventional cars already.

According to a study of the US Air Force Avionics Integrity Program from about two decades ago failure of electronics systems in about 55% of all cases was due to thermal issues. This figure is being quoted since then. Actually, I have my personal evidence for this from my own history of using a PC at home. My actual PC at home broke down twice. The first breakdown was something I could smell and see – there was a smoke signal issued by the machine: the controller IC in its hard-drive electronics simply burnt out. The second computer breakdown I had was when my 7 years old no-name PC stopped working completely. In this case I was not sure if it was a real hardware failure. I suspected that either the BIOS has forgotten its contents or my well known operating system gave up after 7 years of service. So, the ratio is 50-50. 

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Thus, making sure that we eliminate half of the possible failures is really very important. With such an action we can double the reliability of our systems. The question is, how one can achieve reducing the number of thermal problems? Of course with thermal-aware design. By doing so, we can eliminate our own failures.

But how about the failures of our suppliers? What can we do if we have to build our systems using all kinds of components (packaged IC chips, diodes, transistors), thermal interface materials, heat-sinks and other cooling assemblies? We have to make sure that all the components are reliable and the final assembly is also good. A typical failure mechanism which leads to thermal problems is when the thermal interface materials degrade, or thermal interfaces (such as die attach) delaminate. And this is something that can be observed by thermal transient measurement based structural analysis. A nice example of this got recently published at the THERMINIC Workshop held in October in Barcelona: with a joint effort of the Pannon University (Veszprém, Hungary) and BME (Budapest, Hungary) long term stability of LEDs aimed at streetlighting applications was studied. The usual LM80 LED testing procedure was combined with thermal transient measurements. In many cases degradation of the applied TIM material was found during these tests, but other failures like delamanition of the LED from its MCPCB substrate was also among the major degradation mechanisms. And this is just one example which shows how thermal transient testing can be used to increase product reliability. Further examples will be shown in one of our coming webinars. So, if you are interested, come and sign up for this event! See you next time!

Andras

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15 November, 2010

So, there we are. Finally. I am always reluctant to start with fancy features of Web 2.0. I have resisted for quite a while to be present on FB. When many young colleagues around me started using terms such as Giga-like (meaning “I like it a lot”) I just thought, I had to learn about this a bit. Also, from time to time I read blog entries on culture and politics. Sometimes they are quite interesting… Then I’ve seen Mentor blog posts from my friends at the Hampton Court office providing lots of interesting thoughts, views and ideas about CFD and FloTHERM in particular, I just thought I also could share with interested readers great many things about T3Ster and TERALED.

Yes, these funny words are the names of Mentor’s thermal testing hardware solutions aimed at physical testing of the thermal properties of packaged semiconductor devices. These are called the MicReD products. T3Ster stays for THE thermal transient tester – a sophisticated test system who’s name starts with three T-s, therefore we could not name it anything else like “3-ster” (say tri-ster). TERALED is also a speaking name which, I believe is easy to understand both by native English speakers and by any other human being who speaks some technical English like me – a native Hungarian. TERALED simply stays for Theramal and RADiometric testing of LEDs – an add-on solution to T3Ster which is specifically aimed at comprehensive testing of power LEDs.

In my first post I do not think I should write anything technical about our equipment and related software solution (what we simply call the MicReD T3Ster-technology) since over the last decade the MicReD team jointly with researchers from the Department of Electron Devices of the Budapest University of Technology and Economics have published great number of technical papers on thermal testing and compact thermal modeling of packaged semiconductor devices, stacked die packages, power LEDs, die attach testing and most recently about testing of TIM – as key contributors to the NANOPACK project of the FW7 program of the EU. Some of these papers and others are downloadable from Mentor’s web site as whitepapers and webinars on LED thermal testing and system level thermal testing are also available as video on demand.

With the launch of the Mentor Graphics Thermal Testing Hardware blog I plan to provide quick updates on recent events and developments, provide links to interesting topics, conference papers, technical news and so on. Simply, I plan to provide information about how to measure the thermal world of real semiconductor devices.

So, 15th of November is a birthday. Not only mine. It is the birthday of this blog. Long live the thermal testing hardware blog – welcome to read this!

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