Posts Tagged ‘IR Drop/Thermal co-simulation’
Simulation is a way of predicting reality. The more information we put into the simulation, the better our prediction of what is really going to happen. Certain aspects of electrical simulation, like signal integrity, can be simulated relatively “independently” of other influencing forces. Sure, there are some temperature dependencies on silicon behavior, and those are typically represented by IBIS models created at different temperatures for fast, typical, and slow silicon behavior. And also, the issues of vias tend to complicate things, as they blur the world between traditional signal integrity and power integrity as well as 3D electromagnetic simulation. However, no two disciplines are more closely related than thermal analysis and power integrity, more specifically DC Drop.
The voltage drop across a plane is determined by the conductivity of the copper. Copper conductivity changes 4% for every 10degC of temperature change. That equates to a 32% change for an 80degC temperature rise, which is pretty significant. So, in order to find an accurate measure of the voltage drop, temperature needs to be included. The other interesting aspect of this is that drops in voltage mean power is being dissipated by the plane, power that is being dissipated as heat. So, the results of each of these analyses will affect one another. Hence, the need for PI/Thermal Co-simulation.
You can read more about this in my recent article in Printed Circuit Design and Manufacturing Magazine:
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