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AskJian RSSEver wonder the effects of shared anti-pads on differential signals?
By Zhen Mu & Jian X. Zheng
Vias are the structures that exist on almost every net in high speed digital PCB designs. Because of its 3-dimensional features, a via introduces reflections to signals traveling through it. Designers and Signal Integrity (SI) engineers have been trying hard to design vias that present minimum degradation impact on signals. This becomes an even more important task in SERDES designs where the data rates are approaching 25Gbps.
One design method to reduce via discontinuity effect is to use a shared anti-pad for differential vias in connector pin fields, as Figure 1 illustrates.
- Figure 1 Using shared anti-pads in connector pin fields
Studies show that the benefit using shared anti-pads in this way is reduced capacitance load to planes. What has not been fully discussed is whether the benefit holds when differential traces are connected to the vias that use shared anti-pads; in other words, what would the signal quality be when differential signals go through a pair of differential vias with shared anti-pads? Figure 2 shows the configuration of such cases.
![Microsoft PowerPoint - Zhens images [Compatibility Mode]](http://s3-blogs.mentor.com/askjian/files/2011/03/figure-24.jpg)
- Figure 2 Using shared anti-pad on differential signal path
One thing to pay attention to is the area under the feeding traces that connect to the differential vias. We can compare this area in the shared anti-pad configuration with the one using separate anti-pads shown in Figure 3. The shared anti-pad takes away part of via coupling to planes, which reduces the capacitance between via barrow and planes; however, it also takes away the reference plane, or the return path, of the feeding traces when they are approaching the connection points to vias. Of course, the effect can be less significant in the case of tightly coupled differential, but it will always be there.
- Figure 3 Using separate anti-pad on differential signal path
Next, let’s take a look at the S-parameter models extracted from the two structures in Figure 2 and 3. Both of them have the same geometry parameters, except one uses separate anti-pads, and the other shares anti-pads in a shape close to “Oblong”. The 12 layer stackup is shown in Figure 4. All the inner layers are planes for the purpose of study.
- Figure 4 Stackup of a 12-layer design
Figure 5 provides comparison of insertion loss from the two structures. We can see that both S-parameter models behave very similarly before the first resonance point; but the shared anti-pads increase the loss a little in the frequency range of 2GHz to 8GHz, because of the reference plane reduction, while they help shift the resonant peak further to higher frequencies (from 18GHz to 18.5GHz) due to the reduced capacitance load.
- Figure 5 Comparing insertion loss (12 layer design) — Purple: shared anti-pads; Blue: separated round anti-pads
Another test case with fewer layers reveals similar results. Figure 6 shows comparisons of S-parameters of a 6 layer design. Shared anti-pads do not show their benefits until via-to-plane capacitance starts being effective; before that happens, using separate anti-pads actually provides better signal quality.
- Figure 6 Comparing insertion loss (6 layer design), Purple and Green: shared anti-pads, Blue and Yellow-: separated round anti-pads
In summary, the study shows that using shared anti-pads for routed differential signal paths is probably more meaningful to physical layout than to improving signal quality. The effect of shared anti-pads is frequency dependent, and the gain from reduced capacitive loading is achieved by sacrificing certain portions of signal return path. Designers should be aware of such trade-off when applying the technique.
Reference
[1] Ravi Kollipara and Ben Chia, Modeling, verification of backplane press-fit vias, EETimes India, Oct.2004
[2] B. Wu and L. Tsang, FULL-WAVE MODELING OF MULTIPLE VIAS USING DIFFERENTIAL SIGNALING AND SHARED ANTIPAD IN MULTILAYERED HIGH SPEED VERTICAL INTER-CONNECTS, Progress In Electromagnetics Research, PIER 97, 129-139, 2009
Tags: ZM_shared_anti_pad
How can we obtain the s-parameters data with non-50 normalization?
On IE3D, we obtain the 50-ohm normalized s-parameters automatically. However, we would like to obtain non-50 ohm normalized s-parameters. For example, for differential pair design, we may want the 100-ohm normalized s-parameters.
IE3D saves s-parameters into Touchstone format with default 50-ohm normalization impedance. To get the s-parameters not normalized to 50-ohm, you can do the following: On MODUA, select FILE->DISPLAY PARAMETER MODULE and select the file of interests. Select CONTROL->DEFINE DISPLAY DATA. Pick dB and Phase of S-Parameters and select OK. Check the items you want to display. Select OK, you will see the tabulated s-parameters on MODUA. Optionally, you can select VIEW->GRAPH PARAMETERS to change the valid digits for the data. Select CONTROL->TERMINATING IMPEDANCE to change the normalization impedance for each port. Select FILE->SAVE DISPLAYED DATA to save the re-normalized s-parameters into a data file for post processing.
The effects of different bends on performances of wideband digital circuits.
Bends presenting on a SERDES channel introduce discontinuity effects. Normally, such effects are caused by the extra capacitance at the corner of a bend. It will add reflections to the channel signal and can generate radiation at higher frequencies. Minimizing discontinuity effects of SERDES channels has become an issue channel designers need to consider.
In RF design applications, engineers have been using bends with chamfered corners to reduce radiation from right angle bends. Will such bend structure also behave better in digital applications and introduce less reflection on signals?
To answer this question, we studied different bend structures (see Figure 1 to Figure 4) and compared their behaviors with short traces without bends. What we found is: for a wide band signal, such as SERDES signals, a particular bend structure may not always provide better behavior than other bend structures over the entire frequency range. In our tests, we used chamfered bend and a bend with round corner. Two bends of each kind are connected to a pair of differential traces with total length of 500mil. The S-parameters of the two nets are extracted using IE3D. For comparison, the differential traces without bends are also modeled with the same 3D field solver.
The results (see attached table and images) show that chamfered bends introduce less reflection than straight differential traces do at low frequencies (see Figure 5). This is because the trace impedance is not maintained at 100-ohms at all frequency points (see Table 1). However, chamfered bend structure has the worst behavior around 10 GHz due to the resonance caused by discontinuities
In conclusion, certain bend structure may introduce less discontinuity effects at certain frequencies. Designers for SERDES channels need to examine entire frequency range of SERDES signals to determine if using one type of bend structure has more advantage than using others.
Table 1: Comparison on the equivalent Zc in different frequency ranges.
Tags: Electromagnetic Simulation, EM Simulation, IE3D, RF
What is full-wave EM simulation?
Macro electromagnetic phenomenons are governed by the Maxwell’s Equations or a set of differential equations with some boundary conditions. People solve such equations numerically. Such techniques are called EM simulations. Due to the complexity of the problems, some people try to simplify the problems by introducing some approximations. One most frequently used approximuation is assuming the frequency is approaching DC. They try to solve the problem at DC and extend the results to higher frequency. Such technique can yield good results when the structure is electrically small. When the size of the structure is comparable to a wavelength, such technique will yield inaccurate results. Full-wave EM simulation does not assume frequency at DC. Instead, it solves the Maxwell’s Equations with little approximation. When properly implemented, full-wave EM simulations can be very accurate from very low frequency to very high frequency.
Tags: EM Simulation, IE3D
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Latest Posts
- Ever wonder the effects of shared anti-pads on differential signals?
- How can we obtain the s-parameters data with non-50 normalization?
- The effects of different bends on performances of wideband digital circuits.
- What is full-wave EM simulation?